As is well known, in the specific field of this invention, SSP (Super Smart Power) power devices are currently employed which have analog, power and signal components, as well as digital control components for controlling the power components, both integrated on the same semiconductor die.
The control action is generally provided and managed by a microcontroller which runs a control program stored in a memory, also provided on the same die.
In particular, memories of the ROM type or the OTP EPROM (One Time Programmable EPROM) type are integrated for that purpose.
This approach has certain drawbacks in applications where calibration parameters are to be introduced in order to exert an adequate control action on each specimen of the device to be controlled.
The above requirement is currently met by having these parameters stored in memories other than those storing the control program. These memories are of the non-volatile type, such as EEPROMs, and are also integrated on the same die as the microcontroller. However, due to the high area requirements of the basic cell, non-volatile memories must be dimensioned to occupy the least possible amount of circuit area.
This prior approach affects the versatility of the control program in that only a limited number of parameters of the device to be controlled can be stored.
Another possible solution would be that of storing such calibration parameters into memories outside the die.
While achieving its objective, not even this solution would be devoid of drawbacks. In fact, it is important for certain applications that the number of pins taken up by the connections to external circuitry be kept as small as possible. Furthermore, the use of external memories adds to the complexity of the control action for managing the external memories.